IC Layout Senior Engineer

This is a remote position.

ROLE DETAILS :

• Industry: manufacturer of Microprocessors with embedded AI
• Location : Remote EU or France (Paris) with occasional travel to Head Office Markets : Worldwide/Internationational
• Minimum expérience : 3 years

Environnement : Cadence tools : Virtuoso and other tools from the Cadence suite Fine Element analysis tools like Altair SImSolid, Ansys Mechanical, HyperWorks, Femap, ANSYS, Abaqus, Patran, SimScale. Techniques : Layout automation, Analog layout, analog and mixed-signal circuits, floorplans, block-level layouts, process design rules, ADC Layout, DAC Layout, Languages : English (mandatory), French is a plus but not mandatory Your manager : the R&D Director MISSIONS As a Layout Engineer within the Analog IC team you will : Lead the layout of custom ICs and analog components while developing automation tools. Design and implement custom layouts for analog and mixed-signal circuits, including custom analog and RF components, while minimizing parasitic effects to enhance the DC and AC precision of analog signals. Create floorplans and block-level layouts for high-performance analog systems. Ensure alignment with process design rules and foundry specifications. Collaborate with foundry engineers to resolve layout-related issues during manufacturing. Develop and utilize custom scripts or tools to efficiently automate repetitive layout tasks.